Investigation of the Radio Frequency Characteristics of CMOS Electrostatic Discharge Protection Devices

The input conductance of CMOS and many other integrated circuit technologies is determined mainly by the electrical properties of on-chip electrostatic discharge protection devices. Generally, they are designed to have diode-like characteristics to shunt potentially harmful static charge away from thin gate-oxide insulators. These nonlinear junctions may also rectify radio-frequency signals coupled onto CMOS data lines from incidental or malicious sources of interference. The rectification process generates down-converted voltages that may cause spurious response in the CMOS such as logic errors, persistent latching (upset), or undesirable shifts in logic levels. This paper presents a theoretical, numerical and experimental investigation of the radio-frequency characteristics of CMOS electrostatic protection. The inputs of commercial devices were excited by microwave pulses with the carrier frequency tuned near the parasitic resonance. The results show the regimes where microwave pulses cause state errors and unstable operating conditions in the circuit. In some devices, quality factors as high as four were measured, and upset occurred with carrier amplitudes as low as 350 mV. Good agreement between theoretical, numerical and experimental results is demonstrated, and a generalized approach to predicting radio-frequency effects in CMOS with electrostatic protection is introduced.